Santa Clara University

Courses in Computer Engineering

Graduate Schedule of Classes

The following information is taken directly from the course availability system, and is usually more accurate than the printed copy of the schedule. If no results are shown then the schedule has not yet been posted or the system is down. Students can also use eCampus to search for classes.

Winter 2014: Graduate Engineering, School of Engineering
Subject Computer Engineering
Course COEN 208
Title SoC Formal Ver Tech
Units (min/max) 2.00/2.00
Description With continuous increase of size and complexity of SoC, informal simulation techniques are increasing design cost prohibitively and causing major delays in TTM (Time-To-Market). This course focuses on Formal algorithmic techniques used for SoC Verification and the tools that are widely-used in the industry to perform these types of verifications. These included both programming languages such as System Verilog, Vera, and e-language. The course also covers the various Formal Verification techniques such as propostitional logic; basics of temporal logic. Theorem proving, and equivalent checking. Industrial-level tools from leading EDA vendors will be used to demostrate the capabilities of such techniques. (Also listed as COEN 208.) Prerequisites: ELEN 500 or COEN 200 and ELEN 603 or equivalent.
Term Class Instructor(s) Meeting Days Meeting Times Location
Winter 2014 94910 El-Ziq,Yacoub M S
08:00 AM-05:00 PM

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