Advisory Board The Advisory Board of the Electrical Engineering Department meets three times each year to provide input on academics, research, administration, outreach, advocacy, and development. The Board reviews the graduate and undergraduate curriculum and degree programs, program educational objectives, and program outcomes, and offers suggestions for change to keep them current. The Board evaluates the quality and scope of our research, its relationship to our programs, its relevancy and helps guide future directions. The Board recommends ways to build new relationships with industry and to strengthen those we have. The current Board Chair is Frank Barone. The biographies of its members are as follows: David DeMarinis is the senior director and general manager of the SERDES Technology Group where he is responsible for developing high speed serial IO solutions for Xilinx FPGAs. He is also responsible for developing mixed-signal data acquisition solutions for Xilinx products. Previously, DeMarinis served as general manager of Xilinx Design Services and built a team to drive revenue and deliver customized solutions to Xilinx clients world wide. Before joining Xilinx 
| Frank J. Barone joined Lattice in June 1999 as a Corporate Vice President as a result of the Vantis acquisition. From September 1997 until he joined, Mr. Barone was Chief Operating Officer of Vantis Corporation, a spin-off from Advanced Micro Devices. Prior to Vantis, Mr. Barone spent 14 years at Advanced Micro Devices where he held various managerial positions. He also spent 12 years at National Semiconductor and four years at Motorola, Inc. Barone has a Bachelor's degree in Electrical Engineering and a Master's degree in Materials Science, both from Marquette University in Milwaukee, Wisconsin. Frank holds several patents in integrated circuit process technology and is a member of the Tau Beta Pi and Eta Kappa Nu engineering honor societies as well as the IEEE. | 
| John Y. Chen has 30 years of experience in IC industry ranging from IDM to Foundry to Fabless companies. He started his career as a researcher in Hughes Research Laboratories, subsequently at Xerox Palo Alto Research Center (PARC). Most of his work involves CMOS devices and process technologies. Later, he has had various technical and managerial positions in technology and manufacturing. He was the Director of Technology Development at Cypress Semiconductor. In 1992, He joined TSMC as the Senior Director responsible for Product Engineering and Backend Operations. He was later promoted to the V.P. of R&D, building technology base for TSMC, defining and driving technology roadmaps for the foundry industry. In 1997, he joined the start-up team as the V.P. of Operations for WaferTech, a JV then led by TSMC in Camas Washington. He built and ramped up the fab to 30,000 wafers a month. During his last year in WaferTech, he became the V.P. of Business Development. Since 2004, he has been the V.P. of Technology and Foundry Operations at NVIDIA Corporation. Dr. Chen has taught an earlier-bird course, “CMOS device physics and technology”, at the EE department of Santa Clara University three semesters. He was a visiting professor at Chiao-tung University in Hsin-chu, Taiwan teaching “Submircometer VLSI Technology”. He has given many lectures through U.C. Berkeley and UCLA Extensions in device physics and IC technology. Dr. Chen has authored 100 papers, mostly published by IEEE journals. His book on “CMOS Devices and Technology for VLSI “ was published by Prentice Hall in 1990. He was elected as an IEEE Fellow in 1992 for "leadership in and contributions to advanced CMOS device and process technology". He was a member of the Technical Advisory Committee for ITRI Taiwan from 1988 to 1992. He now serves on the Technical Committees for both SIA and GSA. He is also a board member on the Monte-Jade Science and Technology Association. Dr. Chen was a Howard Hughes Doctor Fellow and received a Ph.D. in EE and an Executive Management degree, both from UCLA. He also holds a M.S. from University of Maine and a B.S. from National Taiwan University, both in E.E. |
| David DeMarinis is the senior director and general manager of the SERDES Technology Group where he is responsible for developing high speed serial IO solutions for Xilinx FPGAs. He is also responsible for developing mixed-signal data acquisition solutions for Xilinx products. Previously, DeMarinis served as general manager of Xilinx Design Services and built a team to drive revenue and deliver customized solutions to Xilinx clients world wide.
Before joining Xilinx, DeMarinis served as director of strategic marketing and business development at ESS Technology – the market leader in PC Audio chips. He started his career at Texas Instruments as a mixed signal applications engineer and later as a technical sales representative calling on Apple Computer. DeMarinis received his bachelor’s degree in electrical engineering from The Ohio State University |
| Chris Hong graduated from Santa Clara University in 2004 with a BSEE. He joined ITT Defense in 2004 as an RF Design Engineer, and has participated in the design and manufacture of Signal Intelligence and Electronic Warfare systems. Chris continued his education during his employment at ITT Defense, earning an MSEE from Santa Clara University in 2006. Chris is also a member of the Tau Beta Pi Engineering Honor Society.
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| Ronald Jew has been with IDT for more than 15 years and has held positions in product engineering development and product line management. His current role is product line director of the multi-port memory division. The multi-port memory product group is a plus $70 million revenue per year product line, making IDT the industry leader in this area. Ron is responsible for driving the strategy, direction and execution of multi-port memories as well as the product development and engineering, production control, marketing and applications engineering. Ron formerly served as product engineering director of the multi-port memory product group, overseeing product development and sustaining, test and yield enhancement on multi-ported SRAMs. Ron is a graduate of Santa Clara University, earning a Bachelor of Science degree in electrical engineering in 1985 and a Masters of Science degree in electrical engineering in 1987. |  | Mark Maloney graduated from SCU with a BSEE in 1993. From SCU, he joined Hewlett-Packard where he spent his first two years as a test development engineer in a high-speed, bipolar, IC group. Mark spent the next six years as an ASIC design engineer and customer interface on large, digital, CMOS ASICs for HP LaserJet printers. As part of the Agilent then Avago spin-offs, he spent the next five years designing analog ICs for the Wireless Semiconductor Division. Mark current works for Rohde & Schwarz as a field applications engineer in the wireless and mobile-communications sector. Mark earned his MSEE from Stanford in 1999 through Stanford's Honors Co-Op Program, was elevated to IEEE senior member in 2001, and holds one U.S. patent in the area of testability. | 
| Jim Brug is the manager of the Imaging Materials Department at Hewlett-Packard Laboratories in Palo Alto, California. Jim joined HP Labs in 1984 after receiving his Ph.D in Applied Physics from Yale University. His research has covered a variety of topics in magnetics, thin film devices, MEMS and nanomaterials. Technologies that he has helped develop for HP include magneto-optic recording, magnetic disk drives, probe storage, MEMS micromovers, magnetic memory, biosensors, OLED displays and printed electronics. He spent a year with the National Institute of Standards and Technology working on the fundamentals of magnetics and he also led an ATP/NIST funded program on Ultra-High Density Recording Heads. |  | Chuck Taubman retired from Hewlett-Packard/Agilent in 1999 after 33 years of service as an R∓D Engineer and Functional Manager of Personnel, Quality, and Manufacturing. His degrees are from Stanford (BSEE), MIT (MSEE), and Santa Clara (MBA). He has a long association with Santa Clara University and has recruited here for HP for 25 years. He does extensive volunteer work in the community for his faith group. |
| David Weng was most recently an Engineering Director in Internet Technologies Division of Cisco Systems Inc. He has 20 years of industry engineering experience in computer and networking area. David joined Cisco in 1992, where he established Software Engineering Solutions and Automated Network Testing Infrastructure for Cisco from scratch. His team is responsible for developing integrated test technologies to provide end-to-end automated test solutions for Data, Voice, and Video networks. David manages several R&D groups in San Jose, CA, Research Triangle Park, NC, India, and Taiwan. His team has partnered with National Chiao-Tung University and III in Taiwan to develop Internet Technologies since March 2000. David Weng graduated from Fu-Jen Catholic University in Taiwan in 1979. He earned his M.S. Computer Science Engineering degree from San Jose State University in 1983. Prior to joining Cisco, David worked for Hewlett-Packard for 7 years. He managed a development group at HP, Information Networks Division. David also worked at Sun Micro Systems and Software Publishing Corporation as senior engineering managers. He is a member of FAPA 100, and serves as the Vice President of Taiwanese Industrial Technology Association Silicon Valley Chapter. | Past Advisory Board Members:
| Robert E. Fontana, Jr. received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from the Massachusetts Institute of Technology in 1969, 1971, and 1975, respectively. He has worked to develop and improve thin-film process technologies for manufacturing magnetic device structures for the past 28 years. Dr. Fontana is a Member of the National Academy of Engineering (2002) and a Fellow of the Institute of Electrical and Electronic Engineers (1996). In 2000 Dr. Fontana received the IEEE Cledo Brunetti Technical Field Award for excellence in the art of electronic miniaturization for contributions to the manufacture of thin film magnetic recording heads. Dr. Fontana was President of the IEEE Magnetics Society for 2001-2002. He holds 49 patents on magnetic thin-film structures and has authored 33 technical papers on magnetic storage device structures. From 1975 to 1981, Dr. Fontana worked at Texas Instruments, where he was responsible for new product and process development for 92 Kbit, 256 Kbit, and 1 Mbit magnetic bubble devices. From 1981 to 2002, Dr. Fontana worked at IBM, in both the Research Division and the Storage Products Division, which recently became part of Hitachi Global Storage Technologies, where he was instrumental in making the innovative thin-film magnetic recording heads that have enabled the industry's huge 3,000-fold increases in data storage density. Dr. Fontana's present focus is on the processing and fabrication issues for future advanced magnetic sensors. |
| Hamadi Jamali is currently engaged in creating a vision for the first Toyota Information Technology Research Center in North America. Before that, he helped Roger Melen and Harry Garland, two PC pioneers, form the first Japanese Research Center in North America for Canon where he led the research group for over 8 years. Hamadi has 3 US patents in networking, document processing, and pattern recognition to his credit as well a number of publications. Hamadi holds a Ph.D. in E.E. from Santa Clara University, an M.S.E.E. from the Naval Postgraduate School in Monterey, and an Ingenieur d'Etat from l'Ecole Royal Navale. Hamadi is a member of IEEE, an active balloting member of the IEEE 802 standards body, and a past board member of NHF. | | | Charles C. Morehouse graduated from the University of California at Berkeley in 1970 with a Ph.D. in Elementary Particle Physics. He worked first at the Deutsches Elektronen Synchrotron in Hamburg, Germany and then at the Stanford Linear Accelerator Center in Stanford, California on elementary particle physics experiments for a total of six years. He spent three years at Varian Associates in Palo Alto, California working on whole body computer assisted tomography scanners. He joined Hewlett-Packard in 1979 to work on magnetic thin film recording disks. He moved on to work in machine vision, artificial intelligence (during an appointment at Hewlett Packard Laboratories in Bristol, England) and returned to the storage field in 1991. Since 1999 he has been the Director of the Information Access Lab, managing research in advanced storage materials and systems. Dr. Morehouse is also currently the chairman of the Industrial Advisory Panel of the Materials Department of Oxford University. |
| Yoshio Nishi, Director, Stanford Nanofabrication Facility, received BS in material science and Ph.D. in electronics engineering from Waseda University and the University of Tokyo, respectively. He joined Toshiba R&D, Japan, in the areas of research for semiconductor device physics and interfaces mostly in silicon, resulting in discovery of ESR PB Center at SiO2-Si interface, the first 256bitMNOS non-volatile RAM, SOS 16bit micro-processor and the world 1st 1Mb CMOS DRAM. He joined Hewlett-Packard (1986) as the Director of Silicon Process Lab, followed by establishing ULSI Research Lab as the Founding Director. He joined Texas Instruments, Inc. (1995) as Senior VP and Director of Research and Development for semiconductor group, where he implemented new R&D model for silicon technology development by establishing Kilby Center. Since May 2002, he became a faculty member of Stanford University. Published more than120 papers including conference proceedings, and co-authored 7 books. Hold more than 70 patents in US and Japan. He has served SRC and International Sematech as Board member, on the NNI Panel, and on the MARCO Governing Council. Dr. Nishi was elected Fellow of IEEE in 1987, and he is a recipient of the 1995 IEEE Jack Morton Award, and the 2002 Robert Noyce Medal. |
| Linda C. Smith received her M.S.E.E. degree from Santa Clara University in 1984. She graduated from the University of California, Santa Cruz with a B.S. degree in Physics in June, 1979. She has more than 20 years experience in the semiconductor industry, primarily working in device electrical characterization and SPICE modeling of semiconductor devices, including CMOS, BiCMOS and Bipolar technologies. She is currently Director of SPICE modeling at National Semiconductor, reporting to the Vice President of Advanced Process Technology Development. In this capacity, she is responsible for managing 14 engineers. In addition, she interfaces with circuit designers, CAD groups, and process development groups both within the company and in the customer/vendor community at large. | |
