Santa Clara University

Cadence University Program Member

Research Projects using Cadence Design Tools

  • The group focusses research in areas like RF and Microwave transceivers associated circuits. The focus is on RF power amplifiers operating in the Ka and milli-meter wave frequency bands. The challenges in Silicon based designs at such frequencies include being able to deliver adequate power levels with reasonable efficiency. This entails challenging design considerations for both the amplification stage as well as any subsequent combining structure that would follow. GaAs (pHEMT) based design is better suited for power amplification architectures at these frequencies and consequently it is another area I am interested in. Finally, wideband IF mixer design in Silicon is another area that the group is pursuing at this time for optimum values for image and LO suppression, 2-tone distortion, conversion gain flatness over frequency and other related parameters.

    Using the Cadence software suite, the group intends to investigate the above research topics using MOSIS 90 nm PDK for silicon based design.

  • Millimeter-Wave CMOS Power Amplifiers Design: The research aims at exploring design challenges in implementing 60GHz power amplifiers in 90nm CMOS processes using Cadence based EDA tools. It is quiet difficult to design millimeter wave power amplifier in CMOS technology due to low supply voltage, thin gate oxide, low breakdown voltage, lossy silicon substrate and tradeoff between power gain vs output power. Using Cadence based EDA tools, the design, modeling and layout optimization of both passive structures such as transmission lines, capacitors, RF pads as well as active devices operating at 60GHz is investigated. It is also challenging to generate high power using low voltage devices. The research also explores the design and implementation of more efficient power combining techniques in order to increase the output power capability of power amplifiers to enable medium and long-range applications.

  • Designing a schematic and running circuit simulation of on-chip switching regulator. The research also investigates mixed signal circuit design and running related simulaton.

  • The group uses Cadence EDA software to investigate low-power, high-PSRR bias blocks for analog ICs. Using the bias circuits to implement an analog IC with a useful function, such as a DC-DC converter is a secondary target that may be pursued contingent upon available time.

  • Using Cadence design tools for the schematic capture and for the simulation and verification of the analog/digital circuits for the research projects. The tools will also aid in the physical design implementation.

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