Santa Clara University

Strain Engineering and Device Performance: Benefit or Compromise?

C.L.  Claeys

IMEC, Kapeldreef 75, B-3001 Leuven, Belgium

EE Dept., KU Leuven, Kasteelpark Arenberg 10, B-3001 Leuven Belgium

Abstract: To keep track with Moore's law, strain engineering based on either a global or a local approach is gaining much interest and has already been successfully implemented for 65 and 45 nm technology nodes. Although the first goal is to improve the drive current by mobility enhancement, other performance parameters such as leakage current, carrier minority lifetime and low frequency 1/f noise have to be considered. The implementation of a stressor has also an impact on the radiation hardness of the devices.

This presentation will first give an overview of the different strain engineering techniques already used or under investigated nowadays, before discussing more in detail their impact on several electrical device parameters. Attention will be given to illustrate a global approach based on strained Si on strain-relaxed SiGe buffer layers and the use of process-induced stressors such as an embedded SiGe layer and a contact etch stop etch layer (CESL) in a FinFET technology.   Some advantages and disadvantages of the different approaches will be outlined. Finally, also the use of Ge and GeOI as high-mobility substrates is briefly addressed.

Biography: Professor Cor Claeys was born in Antwerp, Belgium. He received the electrical-mechanical engineering degree in 1974 and the Ph.D. degree in 1979, both from the Katholieke Universiteit Leuven (KU Leuven), Belgium.

From 1974 to 1984 he was a Research Assistant and Staff Member, respectively, of the ESAT Laboratory of the KU Leuven and since 1990, a Professor.  In 1984, he joined IMEC as Head of Silicon Processing Group. Since 1990 he is Head of the research group on Radiation Effects, Cryogenic Electronics and Noise Studies. He is also responsible for Technology Business Development and is for IMEC on the management board of several projects funded by the European Commission (NANOCMOS, SINANO, FLYING WAFER, CADRES, STAR, EUROSOI, SEA-NET, PULLNANO). He is also member of the European Expert Group on Nanosciences. His main interests are in general silicon technology for ULSI, device physics, including low-temperature operation, low frequency noise phenomena and radiation effects, and defect engineering and material characterization. He coedited a book Low Temperature Electronics and wrote a book Radiation Effects in Advanced Semiconductor Materials and Devices. He also authored and co-authored eight book chapters and more than 700 technical papers and conference contributions related to the above fields. He has been involved in the organisation of a large number of international conferences and edited more than 35 Proceedings Volumes. He is an associated Editor for the Journal of the Electrochemical Society.

Prof. Claeys is a member of the European Material Research Society, a Senior Member of IEEE and a Fellow of the Electrochemical Society. He was the founder of the IEEE Electron Devices Benelux Chapter, was Chair of the IEEE Benelux Section, was in the period 1999-2005 elected AdCom member of the Electron Devices Society (EDS), and was EDS Vice-President for Chapters and Regions during 2000-2006. Since 2000 he is an EDS Distinguished Lecture. In 2006, he has been elected as EDS President-Elect. He also received the IEEE Third Millennium Medal. Within the Electrochemical Society he has been serving in different committees and was Chair of the Electronics Division (2001-2003). In 1999 he was elected as Academician and Professor of the International Information Academy. In 2004 he received the Electronics Division Award of the Electrochemical Society.