Cadence Design tools are used by the members of Analog Design and Research Group and students at Santa Clara University for various analog and RF design projects.
This page provides information on how the Cadence Design tools are being used for research and academic purposes at Santa Clara University.
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- Virtuoso (AMS design environment, Schematic, Layout, Layout XL)
- Cadence SKILL Development Environment
- Cadence Chip Assembly Router
- Diva Physical Verification and Extractor Suite
- Spectre Simulator
- Assura (DRC, LVS, GUI option)
SCU Courses Using Cadence Tools
ELEN 105 Electromagnetics II
In-depth study of several areas of electromagnetics such as device parasitics, matching circuits, Poisson equation solutions, antennas and antenna arrays, wave-particle duality, and transients in transmission lines. Prerequisite: ELEN 104. (5 units)
ELEN 115 Electronic Circuits I
Study of basic principles of operation, terminal characteristics, and equivalent circuit models for diodes and transistors. Analysis and design of diode circuits, transistor amplifiers, and inverter circuits. (Undergraduate core course.) Prerequisite: ELEN 50. (5 units)
ELEN 144 RF and Microwave Components
The fundamental characteristics of passive and active electrical components. Parasitics, models, and measurements. Modeling of circuit interconnect wiring as transmission lines. Study of crosstalk and other noises in high-speed digital circuits. Use of state-of-the-art CAD tools. Prerequisite: ELEN 105. (5 units)
ELEN 254 Advanced Analog Integrated Circuit
Design architecture and design of sample and hold amplifiers, analog to digital, and digital to analog converters. Design of continuous time and switched capacitor filters.
ELEN 351 RF Integrated Circuit Design
Introduction to RF terminology, technology tradeoffs in RFIC design. Architecture and design of radio receivers and transmitters. Low noise amplifiers, power amplifiers, mixers, oscillators, and frequency synthesizers.
ELEN 354 Advanced RFIC Design
Design and analysis of passive circuits (filters, splitters, and couplers), Gilbert cell mixers, low phase noise VCOs, frequency translators, and amplifiers. Advanced simulation methods, such as envelope and time domain simulations. Class project designed to meet specifications, design rules, and device models of RFIC foundry.
Research Projects Using Cadence Design Tools
- The group focusses research in areas like RF and Microwave transceivers associated circuits. The focus is on RF power amplifiers operating in the Ka and milli-meter wave frequency bands. The challenges in Silicon based designs at such frequencies include being able to deliver adequate power levels with reasonable efficiency. This entails challenging design considerations for both the amplification stage as well as any subsequent combining structure that would follow. GaAs (pHEMT) based design is better suited for power amplification architectures at these frequencies and consequently it is another area I am interested in. Finally, wideband IF mixer design in Silicon is another area that the group is pursuing at this time for optimum values for image and LO suppression, 2-tone distortion, conversion gain flatness over frequency and other related parameters.
Using the Cadence software suite, the group intends to investigate the above research topics using MOSIS 90 nm PDK for silicon based design.
Millimeter-Wave CMOS Power Amplifiers Design: The research aims at exploring design challenges in implementing 60GHz power amplifiers in 90nm CMOS processes using Cadence based EDA tools. It is quiet difficult to design millimeter wave power amplifier in CMOS technology due to low supply voltage, thin gate oxide, low breakdown voltage, lossy silicon substrate and tradeoff between power gain vs output power. Using Cadence based EDA tools, the design, modeling and layout optimization of both passive structures such as transmission lines, capacitors, RF pads as well as active devices operating at 60GHz is investigated. It is also challenging to generate high power using low voltage devices. The research also explores the design and implementation of more efficient power combining techniques in order to increase the output power capability of power amplifiers to enable medium and long-range applications.
Designing a schematic and running circuit simulation of on-chip switching regulator. The research also investigates mixed signal circuit design and running related simulaton.
The group uses Cadence EDA software to investigate low-power, high-PSRR bias blocks for analog ICs. Using the bias circuits to implement an analog IC with a useful function, such as a DC-DC converter is a secondary target that may be pursued contingent upon available time.
Using Cadence design tools for the schematic capture and for the simulation and verification of the analog/digital circuits for the research projects. The tools will also aid in the physical design implementation.
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The web page was last modified on June 11, 2020.
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