Skip to main content

Morusupalli, Rao

Adjunct Professor

School of Engineering


Ph.D., Materials Science and Engineering
M.S., Materials Science and Engineering
B.S., Electrical Engineering

Research Areas

Semiconductors, Thin Films, Materials and Interfaces, Electromigration in Metals, Magnetism in Electronic Materials, Search for Magnetic Monopoles, Integrated Circuit Fabrication Technology, Integrated Circuit Reliability, Design for Reliability, Device Physics, Theoretical and Numerical Modeling, Applied Statistics

Courses Taught

  • ENGR 1
  • ENGR 1L


  • Materials Research Society (MRS)
  • American Institute of Physics (AIP)
  • Institute of Electrical and Electronics Engineers (IEEE)
  • American Physical Society (APS)
  • American Society for Engineering Education (ASEE)
  • The American Radio Relay League (ARRL)
  • Leave No Trace Organization (LNT)
  • Stanford Professionals in Energy
  • Alumnus, School of Engineering, Stanford University
  • Stanford University Alumni Association (SAA)

Book Chapters

  • Cambridge University Press, 9781107408982, Materials, Technology and Reliability for Advanced Interconnects 2005

Selected Publications

click for google scholar link

  • Morusupalli, R., Nix, W., & Patel, J. (2007). Comparison of Line stress predictions with measured electromigration failure times. In 2007 IEEE International Integrated Reliability Workshop Final Report (pp. 124–127).

  • Morusupalli, R., et al. (2009). Addressing IC component Quality and Reliability assurance challenges. In 2009 IEEE International Reliability Physics Symposium (pp. 810–813).

  • Morusupalli, R. (2010). Plastic Relaxation during Thermal Loading in Advanced Cu Interconnects at Intermediate Temperatures: Implications for Stress-induced Voiding (SIV) in Advanced Interconnect Nodes. In Advanced Metallization Conference 2010 (pp. 51–53).

  • Budiman, A., Morusupalli, R., Lee, T.K., Shen, Y.L., Hwang, S.H., Kim, B.J., Son, H.Y., Suh, M.S., Chung, Q.H., Byun, K.Y., & others (2011). Plasticity and Reliability: From Unexpected Plasticity-Induced Damages in Advanced Cu Interconnects to Novel Reliability Phenomena in 3-D Interconnect Schemes Using Through-Silicon Vias(TSV) Technology. Minerals, Metals and Materials Society/AIME, 420 Commonwealth Dr., P. O. Box 430 Warrendale PA 15086 United States.[np]. Feb.

  • Morusupalli, R., Rao, R., Lee, T.K., Shen, Y.L., Kunz, M., Tamura, N., & Budiman, A. (2012). Critical temperature shift for Stress Induced Voiding in advanced Cu interconnects for 32 nm and beyond. In 2012 IEEE International Reliability Physics Symposium (IRPS) (pp. EM–8).

  • Tian, T., Morusupalli, R., Shin, H., Son, H.Y., Byun, K.Y., Joo, Y.C., Caramto, R., Smith, L., Shen, Y., Kunz, M., & others (2016). On the mechanical stresses of cu through-silicon via (tsv) samples fabricated by sk hynix vs. sematech–enabling robust and reliable 3-d interconnect/integrated circuit (ic) technology. Procedia Engineering, 139, 101–111.

  • Morusupalli, R., Littlefield, D., & Nix, W. (2021). Impact of Lorentz Force on Atomic Flux During Electromigration. In 2021 IEEE International Integrated Reliability Workshop (IIRW) (pp. 1–4).